Requirements

  • M4 board
  • Adalogger Featherwing
  • SD card (exFat or FAT32)

Overview

This sketch is the successor of previous M0 attempts at a proper lossless data logging tool. It utilizes the DMA controller to automatically switch between input pins and to place ADC results from result registers into a buffer. It also generates timestamps at regular intervals defined by NUM_RESULTS. Currently, configured to log at ~1KHz.

NOTE

Follows standard config.h format.

Config Values

File Allocation Configuration

EntryNote
BYTES_PER_VALUELeave as-is. Not configurable.
VALUES_PER_LINELeave as-is. Not configurable.
BUF_SAMPLESShould be a power of 2. The bigger this value, the more samples are written to SD at a time.
SHIFT_MULTNumber of left bit-shifts to apply when calculating file preallocation size

SD Configuration

EntryNote
SD_CS_PINChip Select pin. 10 for M4 and 4 for M0
SPI_CLOCK_MHZSPI clock speed. 50 max for M4 and 12 max for M0
WRITE_BUFFER_SIZELeave as-is. Not configurable.
SPI_CLOCKLeave as-is. Not configurable.
SD_CONFIGLeave as-is. Not configurable.

ADC Configuration

EntryNote
USE_AVG_MODEToggles averaging mode on the ADCs. Currently non-functioning - leave at 0
NUM_RESULTSNumber of ADC samples to be buffered before being aligned into SD write buffer. Each ADC gets one of these. The max that can fit in M4’s RAM is ~11,000.
ADC_SAMPLENNumber of ADC cycles per sample.
ADC_FACTOR_VALADC’s prescaler division value. Must be a power of 2 up to 256. Divide’s GCLK clock speed by ADC_FACTOR_VAL.
ADC_PRESCALING_FACTORLeave as-is. Not configurable.

GCLK Configuration

EntryNote
GCLK_DIV_FACTORGeneric Clock generator’s prescaler division value. Divides GCLK clock speed by GCLK_DIV_FACTOR. (This is not a power of 2 like the ADC prescaling factor).
ADC_GCLKThe ID of the generic clock generator to use. Use 2 as it’s unused.

ADC Input Pins

See the mapping here.

EntryNote
ADC0_INPUT_0ADC0’s first input pin
ADC0_INPUT_1ADC0’s second input pin
ADC1_INPUT_0ADC1’s first input pin
ADC1_INPUT_1ADC1’s second input pin

Debug Print Configuration

EntryNote
DEBUG_R0_P0Enable or disable debug prints for ADC0’s first input pin
DEBUG_R0_P1Enable or disable debug prints for ADC0’s second input pin
DEBUG_R1_P0Enable or disable debug prints for ADC1’s first input pin
DEBUG_R1_P1Enable or disable debug prints for ADC1’s second input pin